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dc.contributor.advisorDuane Boning.en_US
dc.contributor.authorHaskaraman, Feyzaen_US
dc.contributor.otherMassachusetts Institute of Technology. Department of Mechanical Engineering.en_US
dc.date.accessioned2017-03-20T19:39:18Z
dc.date.available2017-03-20T19:39:18Z
dc.date.copyright2016en_US
dc.date.issued2016en_US
dc.identifier.urihttp://hdl.handle.net/1721.1/107544
dc.descriptionThesis: M. Eng. in Advanced Manufacturing and Design, Massachusetts Institute of Technology, Department of Mechanical Engineering, 2016.en_US
dc.descriptionCataloged from student-submitted PDF version of thesis.en_US
dc.descriptionIncludes bibliographical references (pages 79-81).en_US
dc.description.abstractThis thesis focuses on a chamber matching methodology for semiconductor manufacturing in Analog Devices Inc.'s fabrication sites. As ADI extends its efforts to implement Internet of Things and predictive maintenance (PdM) to its fabrication facilities, it is also seeking to increase their overall yield by implementing better monitoring and control of processes and matching the performance of chambers. This thesis project was conducted by F. Haskaraman, T. Nilgianskul and T. Nerurkar as a team to make a series of recommendations to improve process yields using statistical control and to show the benefits of chamber matching in particular. Nilgianskul's thesis focuses on the statistical process control and Nerurkar's thesis focuses on Design on Experiments (DOEs). A chamber matching methodology is created and applied to chambers that run the plasma-ashing process. Using design of experiments, the machines are modeled individually and globally. While individual models reveal the mismatch, a global model is proposed as a step to optimize the process recipes for matching. The root cause of the differences is diagnosed with instrumented wafers and in-situ sensor monitoring. Recommendations are made to standardize the hardware and software along with calibration methods. First batch of streamed raw data from an in-situ thermocouple is analyzed and found to be another tool to monitor the chamber performance differences. The process is simulated using an EWMA controller and is found to achieve lower mismatch by keeping outputs of the machine closer to the strip thickness in the case of a process drift. At the end of the project, a chamber matching methodology was recommended to the Analog Devices to complement its Internet of Things efforts. By increasing the routing flexibility and decreasing yield variability and tool qualification, this strategy is expected to save significant amount of costs and increase the quality of its products.en_US
dc.description.statementofresponsibilityby Feyza Haskaraman.en_US
dc.format.extent84 pagesen_US
dc.language.isoengen_US
dc.publisherMassachusetts Institute of Technologyen_US
dc.rightsMIT theses are protected by copyright. They may be viewed, downloaded, or printed from this source but further reproduction or distribution in any format is prohibited without written permission.en_US
dc.rights.urihttp://dspace.mit.edu/handle/1721.1/7582en_US
dc.subjectMechanical Engineering.en_US
dc.titleChamber matching in semiconductor manufacturing using statistical analysis and run-to-run controlen_US
dc.typeThesisen_US
dc.description.degreeM. Eng. in Advanced Manufacturing and Designen_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Mechanical Engineering
dc.identifier.oclc974497804en_US


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