Novel machine learning approaches for modeling variations in semiconductor manufacturing
Author(s)
Chen, Hongge, Ph. D. Massachusetts Institute of Technology
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Other Contributors
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.
Advisor
Duane S. Boning.
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In the competitive semiconductor manufacturing industry where large amounts of data are generated, data driven quality control technologies are gaining increasing importance. The primary goal of this thesis is to build machine learning models for variation analysis and yield improvement. In this thesis, we first propose a novel method to estimate and characterize spatial variations on dies or wafers. This new technique exploits recent developments in matrix completion, enabling estimation of spatial variation across wafers or dies with a small number of randomly picked sampling points while still achieving fairly high accuracy. This new approach can also be easily generalized, including for estimation of mixed spatial and structure or device type information. Then machine learning models for high yield and time varying semiconductor manufacturing processes are developed. Challenges include class imbalance, concept drift (temporal variation) and feature selection. Batch and online learning methods are introduced to overcome the class imbalance. Incremental learning frameworks are developed to handle concept drift and class imbalance simultaneously. We study the packaging and testing process in chip stack flash memory manufacturing as an application, and show the possibility of yield improvement with machine learning based classifiers detecting bad dies before packaging. Experimental results demonstrate significant yield improvement potential using real data from industry. Without concept drift, for stacks of eight dies, approximately 9% yield improvement can be achieved. In a longer period of time with realistic concept drift, our incremental learning approach achieves approximately 1.4% yield improvement in the eight die stack case and 3.4% in the sixteen die stack case.
Description
Thesis: S.M., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2017. Cataloged from PDF version of thesis. Includes bibliographical references (pages 89-96).
Date issued
2017Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer SciencePublisher
Massachusetts Institute of Technology
Keywords
Electrical Engineering and Computer Science.