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Modeling of electron transport in sub-100 nm channel length silicon MOSFETs

dc.contributor.advisorDimitri Antoniadisen_US
dc.contributor.authorJacobs, Jarvis Benjaminen_US
dc.date.accessioned2005-08-17T18:20:10Z
dc.date.available2005-08-17T18:20:10Z
dc.date.copyright1995en_US
dc.date.issued1995en_US
dc.identifier.urihttp://hdl.handle.net/1721.1/11414
dc.descriptionThesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1995.en_US
dc.descriptionIncludes bibliographical references (p. 216).en_US
dc.description.statementofresponsibilityby Jarvis B. Jacobs.en_US
dc.format.extent216 p.en_US
dc.format.extent11272228 bytes
dc.format.extent11271983 bytes
dc.format.mimetypeapplication/pdf
dc.format.mimetypeapplication/pdf
dc.language.isoengen_US
dc.publisherMassachusetts Institute of Technologyen_US
dc.rightsM.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.en_US
dc.rights.urihttp://dspace.mit.edu/handle/1721.1/7582
dc.subjectElectrical Engineering and Computer Scienceen_US
dc.titleModeling of electron transport in sub-100 nm channel length silicon MOSFETsen_US
dc.typeThesisen_US
dc.description.degreePh.D.en_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
dc.identifier.oclc33227898en_US


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