Highly uniform silicon field emitter arrays fabricated using a trilevel resist process

Abstract

Silicon field emitter arrays (FEAs) are a potential candidate for electron sources in a variety of applications. However, one of the major problems that has prevented their widespread use is emitter tip burnout due to Joule heating. The current solution to this problem is to limit the current by using resistors, transistors, or nanowires in series with the field emitter tips. However, this method limits the maximum current performance of FEAs. In this thesis, we explored the idea of increasing the uniformity of emitter tip radii in order to mitigate tip burnout and improve FEA performance and reliability. To test our hypothesis, we established an analytical framework based on current sensitivity for obtaining uniform emission current and reducing tip burnout. Simulations showed that reducing the tip radius distribution is a more effective method for reducing the current sensitivity than increasing the resistance of a current limiter. Next, we developed a trilevel resist photolithography process that eliminates the light reflected at the resist/silicon interface. Using this process, we were able to obtain more uniform dot diameters, and hence etching mask, for fabricating field emitter tips. The transfer characteristics of the fabricated FEAs were measured, and we extracted a narrow range of bFN values from several different array sizes, which implies that the emitter tip radii are uniform. Further, we simulated and measured the output characteristics at low anode voltages and demonstrated the limits of empirical models. Lastly, we experimentally measured the energy distribution of electrons arriving at the anode and demonstrated that the distribution is wider than the calculated intrinsic energy distribution at the emitter; we suggested a mechanism that accounts for this discrepancy, and it should be explored in future works.