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Interactive exploration of design space

Author(s)
Wang, Harrison,M. Eng.Massachusetts Institute of Technology.
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Other Contributors
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.
Advisor
Wojciech Matusik.
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MIT theses are protected by copyright. They may be viewed, downloaded, or printed from this source but further reproduction or distribution in any format is prohibited without written permission. http://dspace.mit.edu/handle/1721.1/7582
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Abstract
Typical design for manufacturing applications requires simultaneous optimization of conflicting performance objectives: Design variations that improve one performance metric may decrease another performance metric. In these scenarios, there is no unique optimal design but rather a set of designs that are optimal for different tradeoffs (called Pareto-optimal). In this thesis, I present a novel approach to discovering the Pareto front, allowing designers to navigate the landscape of compromises efficiently. The approach is based on a first-order approximation of the Pareto front, which allows entire neighborhoods rather than individual points on the Pareto front to be captured. In addition to allowing for efficient discovery of the Pareto front and the corresponding mapping to the design space, this approach allows one to represent the entire trade-off manifold as a small collection of patches that comprise a high-quality and piecewise-smooth approximation. Additionally, I will present the early stages of an extension to the aforementioned work - namely the capability to discover a Pareto gamut that arises from multiple fronts affected by one or more application variables.
Description
This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.
 
Thesis: M. Eng. in Computer Science and Engineering, Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2019
 
Cataloged from student-submitted PDF version of thesis.
 
Includes bibliographical references (pages 57-59).
 
Date issued
2019
URI
https://hdl.handle.net/1721.1/123118
Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Publisher
Massachusetts Institute of Technology
Keywords
Electrical Engineering and Computer Science.

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