dc.contributor.author | Chou, Po-Chien | |
dc.contributor.author | Hsieh, Ting-En | |
dc.contributor.author | Cheng, Stone | |
dc.contributor.author | del Alamo, Jesus A | |
dc.contributor.author | Chang, Edward Yi | |
dc.date.accessioned | 2020-07-15T15:08:36Z | |
dc.date.available | 2020-07-15T15:08:36Z | |
dc.date.issued | 2018-04 | |
dc.date.submitted | 2018-01 | |
dc.identifier.issn | 0268-1242 | |
dc.identifier.issn | 1361-6641 | |
dc.identifier.uri | https://hdl.handle.net/1721.1/126201 | |
dc.description.abstract | This study comprehensively analyzed the reliability of trapping and hot-electron effects responsible for the dynamic on-resistance (Ron) of GaN-based metal–insulator–semiconductor high electron mobility transistors. Specifically, this study performed the following analyses. First, we developed the on-the-fly Ron measurement to analyze the effects of traps during stress. With this technique, the faster one (with a pulse period of 20 ms) can characterize the degradation; the transient behavior could be monitored accurately by such short measurement pulse. Then, dynamic Ron transients were investigated under different bias conditions, including combined off state stress conditions, back-gating stress conditions, and semi-on stress conditions, in separate investigations of surface- and buffer-, and hot-electron-related trapping effects. Finally, the experiments showed that the Ron increase in semi-on state is significantly correlated with the high drain voltage and relatively high current levels (compared with the off-state current), involving the injection of greater amount of hot electrons from the channel into the AlGaN/insulator interface and the GaN buffer. These findings provide a path for device engineering to clarify the possible origins for electron traps and to accelerate the development of emerging GaN technologies. | en_US |
dc.publisher | IOP Publishing | en_US |
dc.relation.isversionof | http://dx.doi.org/10.1088/1361-6641/aabb6a | en_US |
dc.rights | Creative Commons Attribution-Noncommercial-Share Alike | en_US |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-sa/4.0/ | en_US |
dc.source | Prof. del Alamo via Phoebe Ayers | en_US |
dc.title | Comprehensive dynamic on-resistance assessments in GaN-on-Si MIS-HEMTs for power switching applications | en_US |
dc.type | Article | en_US |
dc.identifier.citation | Po-Chien Chou et al. "Comprehensive dynamic on-resistance assessments in GaN-on-Si MIS-HEMTs for power switching applications." Semiconductor Science and Technology 33, 5 (April 2018): 055012 © 2018 IOP Publishing Ltd | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Microsystems Technology Laboratories | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | en_US |
dc.relation.journal | Semiconductor Science and Technology | en_US |
dc.eprint.version | Author's final manuscript | en_US |
dc.type.uri | http://purl.org/eprint/type/JournalArticle | en_US |
eprint.status | http://purl.org/eprint/status/PeerReviewed | en_US |
dspace.date.submission | 2020-07-10T18:59:40Z | |
mit.journal.volume | 33 | en_US |
mit.journal.issue | 5 | en_US |
mit.license | OPEN_ACCESS_POLICY | |
mit.metadata.status | Complete | |