Secure analog-to-digital conversion against power side-channel attack
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.
Anantha P. Chandrakasan and Hae-Seung Lee.
MetadataShow full item record
At the interface between analog circuits and a digital processor, an ADC can create a critical hardware security loophole. By exploiting the power side-channel leakage of the ADC, an attacker can expose the private signal chain data. Having recognized the security threat, this thesis explores both aspects of the SAR ADC power side-channel attack (PSA): attack method and its countermeasure. Firstly, this thesis proposes two neural-network-based SAR ADC PSA methods based on multi-layer perceptron net-works (MLP-PSA) and convolutional neural networks (CNN-PSA). When applied to a SAR ADC without PSA protection, the proposed attack methods decode the power supply current waveforms of the SAR ADC into the corresponding A/D conversion results with very high accuracy, demonstrating themselves as powerful ADC PSA methods. Secondly, this thesis proposes a current-equalizer-based SAR ADC PSA countermeasure. A 12-bit, 1.25MS/s prototype SAR ADC is implemented in 65nm CMOS technology for the proof-of-concept. With the proposed PSA countermeasure, the prototype SAR ADC demonstrated a strong PSA-resistance against MLP-PSA. Due to the second-order power side-channel leakage sources of a current equalizer, the prototype SAR ADC showed weaker PSA-resistance against CNN-PSA, but generally protected a significant portion of the information from the attack.
Thesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, May, 2020Cataloged from the official PDF of thesis.Includes bibliographical references (pages 125-129).
DepartmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Massachusetts Institute of Technology
Electrical Engineering and Computer Science.