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Simplifying multiple-statement reductions with the polyhedral model

Author(s)
Yang, Jianqiao(Jianqiao Cambridge)
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Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.
Advisor
Michael Carbin.
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MIT theses may be protected by copyright. Please reuse MIT thesis content according to the MIT Libraries Permissions Policy, which is available through the URL provided. http://dspace.mit.edu/handle/1721.1/7582
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Abstract
Reduction -- an accumulation over a set of values, using an associative and commutative operator -- is a common computation in many numerical computations, including scientific computations, machine learning, computer vision, and financial analytics. Contemporary polyhedral-based techniques make it possible to optimize reductions, such as prefix sum, in which each component of reduction's output potentially shares computation with another component in the reduction. Therefore an optimizing compiler can identify the computation shared between multiple components and generate code that computes the shared computation only once. These techniques, however, do not support reductions that -- when phrased in the language of the polyhedral model -- span multiple statements. In such cases, existing approaches can generate incorrect code that violates the data dependencies of the original, unoptimized program. In this work, we identify and formalize the multiple-statement reduction problem as a bilinear optimization problem. We present a heuristic optimization algorithm for these reductions, and we demonstrate that the algorithm provides optimal complexity for a set of benchmark programs from the literature on probabilistic inference algorithms, whose performance critically rely on simplifying these reductions. Specifically, the complexities for 10 of the 11 programs evaluated improve significantly by factors at least of the sizes of the input data, which are in the range of 104 to 106 for typical real application inputs. We also confirm the significance of the improvement by showing that the speedups in wall-clock time ranges from 30x to over 108x.
Description
Thesis: S.M., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, May, 2020
 
Cataloged from the official PDF of thesis.
 
Includes bibliographical references (pages 77-82).
 
Date issued
2020
URI
https://hdl.handle.net/1721.1/127316
Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Publisher
Massachusetts Institute of Technology
Keywords
Electrical Engineering and Computer Science.

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