Retry-free software transactional memory for rust
Author(s)Nord, Claire(Claire M.)
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.
Howard Schrobe, Hamed Okhravi and Bryan Ward.
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Software transactional memory (STM) is a synchronization paradigm that has been well-studied in work on throughput-oriented computing. In that context, its main utility lies in aiding programmers in producing performant concurrent programs that are free of synchronization bugs. With STM, programmers merely annotate code sections that require synchronization; the underlying STM framework automatically resolves how synchronization is done. In work on real-time systems, schedulability is more important than throughput. However, all prior work on real-time STM has been limited to approaches that retry transactions when they conflict. Unfortunately, reasonable retry bounds can be difficult or impossible to obtain for multiprocessors. Perhaps because of this, prior work on real-time STM has focused on observed behavior rather than schedulability. This thesis argues that real-time STM should be lock-based and free of retries in order to provide schedulability guarantees, and presents a real-time STM framework called TORTIS, implemented for Rust programs. The efficacy of TORTIS is evaluated via both benchmarking experiments and a schedulability study. In the benchmarks, when contention for shared resources is high, causing retry-based approaches to repeatedly retry, TORTIS provides up to 75x improved throughput. The high-contention case is also effectively what schedulability analysis aims to bound. In the schedulability study, TORTIS dominated other prominent retry-based STM approaches, and improved overall schedulability across all task systems generated by on average 2.4x and as much as 10.1x.
Thesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, September, 2020Cataloged from student-submitted PDF of thesis.Includes bibliographical references (pages 105-108).
DepartmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Massachusetts Institute of Technology
Electrical Engineering and Computer Science.