Neural network fitness function for optimization-based approaches to PCB design automation

Abstract

My team's goal is to fully automate the Printed Circuit Board (PCB) design process. PCB design can be divided into the placement stage, where circuit components are assigned board locations and orientations, and the routing stage, where circuit pins are electrically connected. The primary objective of the placement stage is to place components in a way that leads to a successful routing stage, which is determined by how many total circuit connections can be satisfied without violating any design rules. My team currently focuses on iterative improvement approaches to PCB placement automation. Algorithms in this category use a placement scoring function to guide the optimization process, and their performance heavily depends on how strongly this scoring function correlates with routability, which is defined as the completion rate that would result if the placement were routed. Existing routability proxies include wire length and connection crossings estimates, however these only correlate roughly with routability. This thesis details the development of a neural network that predicts the routability of a placed design, with the end goal of using it as the scoring function in iterative improvment placement alogirthms. A dataset of over 75,000 placed PCB designs derived from six dierent PCBs was generated to train this network. Experiments were performed for both single board and multi board prediction tasks. Networks were evaluated on their ability to predict both absolute and relative routability, and in both domains improvement over traditional routability proxies is demonstrated.