dc.contributor.advisor | Jing Kong. | en_US |
dc.contributor.author | Shen, Pin-Chun. | en_US |
dc.contributor.other | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science. | en_US |
dc.date.accessioned | 2021-01-06T20:17:41Z | |
dc.date.available | 2021-01-06T20:17:41Z | |
dc.date.copyright | 2020 | en_US |
dc.date.issued | 2020 | en_US |
dc.identifier.uri | https://hdl.handle.net/1721.1/129307 | |
dc.description | Thesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, September, 2020 | en_US |
dc.description | Cataloged from student-submitted PDF of thesis. | en_US |
dc.description | Includes bibliographical references (pages 204-220). | en_US |
dc.description.abstract | Scaling of silicon transistors is reaching its physical limits due to severe short channel effects, threatening to end Moore's law. Advanced beyond-silicon electronic technology requires discoveries of both new channel materials and ultralow-resistance contacts. The aim of this thesis is to develop an understanding of the science and engineering in applying synthetic monolayer semiconductors as the channel materials in field-effect transistors and in achieving excellent electrical contacts to these emerging materials. Monolayer semiconductors such as MoS₂,WS₂ and WSe₂ not only offer atomically thin thicknesses for device minimization, but also embrace desirable physical properties such as dandling-bond-free and atomically flat surface, sizable bandgap, and relatively heavier carrier effective mass to enhance transistor performance at the atomic limit. | en_US |
dc.description.abstract | We start by developing scalable methods for synthesizing high-quality monolayer MoS₂ that exhibits near intrinsic characteristics and moderate electron mobility at room temperature. These developments improve the fundamental transport property and reduce the unwanted impurity doping of the synthetic monolayer MoS₂ for electronic applications. Next, we further demonstrate a method to eliminate the detrimental defect states in monolayer MoS₂, which mitigates the defect-state induced Fermi-level pinning at the metal-MoS₂ interface. The monolayer MoS₂ transistors fabricated through this technique exhibit a lowered Schottky barrier and a reduced contact resistance at the metal-MoS₂ interface. This study provides an insight into the defect properties of MoS₂ that are fundamentally related to the device performance. | en_US |
dc.description.abstract | Finally, we provide a deeper understanding of the ohmic contact nature at metal-monolayer semiconductor interfaces and propose a new contact paradigm, gap-state saturation, to overcome the in-gap Fermi-level pinning and eventually eliminate the Schottky barrier. We experimentally apply this new ohmic contact technology to a variety of monolayer semiconductors and demonstrate high-performance monolayer semiconductor transistors. We have achieved record-low contact resistance approaching the quantum limit among all the metal-2D semiconductor interfaces. Our monolayer semiconductor transistors have also reached record-high ON-state current density among all the monolayer devices. We show that monolayer semiconductors can have a performance on par with the state-of-the-art silicon-based technology, reaching the goal of next-generation transistor technologies. | en_US |
dc.description.statementofresponsibility | by Pin-Chun Shen. | en_US |
dc.format.extent | 220 pages | en_US |
dc.language.iso | eng | en_US |
dc.publisher | Massachusetts Institute of Technology | en_US |
dc.rights | MIT theses may be protected by copyright. Please reuse MIT thesis content according to the MIT Libraries Permissions Policy, which is available through the URL provided. | en_US |
dc.rights.uri | http://dspace.mit.edu/handle/1721.1/7582 | en_US |
dc.subject | Electrical Engineering and Computer Science. | en_US |
dc.title | Ohmic contact to monolayer semiconductors | en_US |
dc.type | Thesis | en_US |
dc.description.degree | Ph. D. | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | en_US |
dc.identifier.oclc | 1227779042 | en_US |
dc.description.collection | Ph.D. Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science | en_US |
dspace.imported | 2021-01-06T20:17:40Z | en_US |
mit.thesis.degree | Doctoral | en_US |
mit.thesis.department | EECS | en_US |