Energy efficient SAR ADC with resolution enhancement for sensor signals

Abstract

Many signals from sensors are low activity signals that spend most of its time around middle of the full scale with occasional large activity. A/D conversion of such signals using a conventional ADC with a constant resolution and a full-scale search space consumes unnecessary amounts of time and energy. SAR ADC architecture using a comparator and Capacitor-DAC has been the choice for this application space due to minimal analog components and low static power consumption while providing moderate speed and resolution that is adequate for sensor signals. DAC and comparator power reduction has been the focus of attention as the logic automatically benefits from digital centric process scaling. This work develops an energy efficient 10B/12B SAR ADC for such sensor signals using a new algorithm to save energy and time and use the savings for resolution enhancement.