Design and fabrication of III-V broken-band vertical nanowire Esaki diodes

Abstract

In order to further reduce transistor power consumption of MOSFETs in logic applications, transport mechanisms other than thermionic emission over an energy barrier are required. Among all possible mechanisms, quantum tunneling emerges as one of the most promising. Therefore, the design and demonstration of Tunnel Field-Effect Transistors (TFETs) have received much attention in the past few years. In spite of intense research, the results to date have been disappointing. In this thesis, we utilize the unique broken-band alignment and the superior carrier transport properties in the GaSb/InAs material system for obtaining high drive tunneling current. In order to quantitatively evaluate the quality of the tunneling junction, GaSb/InAs vertical nanowire Esaki diodes are studied both theoretically and experimentally. In the simulation part, we calculate the band structure of small-diameter nanowires within a self-consistent quantum-mechanical simulation environment, and apply it to a technology computer-aided design (TCAD) tool for device electrical characteristics modeling. Device operation principles as well as key design parameters are studied. In the fabrication part, critical process technologies are developed, optimized, and integrated into two process flows. Using the two process flows, two generations of GaSb/InAs vertical nanowire Esaki diodes are fabricated with the smallest diameter being 10 nm. We observe a record-high Esaki peak current density over 200 MA/cm² with good scaling characteristics for diameter < 70 nm. A peak-to-valley current ratio (PVCR) of 3.4 is demonstrated. These results shed light on the potential of achieving high drive current and steep turn-on in GaSb/InAs TFETs for future VLSI applications.