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A VLSI systolic array processor for complex singular value decomposition
(Massachusetts Institute of Technology, 1994)
Store Buffers : implementing single cycle store instructions in write-through, write-back and set associative caches
(Massachusetts Institute of Technology, 1994)
This thesis proposes a new mechanism, called Store Buffers, for implementing single cycle store instructions in a pipelined processor. Single cycle store instructions are difficult to implement because in most cases the ...
Synchronization issues of the parallel A Star Search
(Massachusetts Institute of Technology, 1994)
An experimental study was carried out on the performance of synchronous and asynchronous implementations of the A* Search on a multiprocessor network. Master-Slave parallelism was used to distribute the Search among the 8 ...