| dc.contributor.advisor | Stephen A. Ward. | en_US |
| dc.contributor.author | Selvidge, Charles William | en_US |
| dc.date.accessioned | 2005-08-15T17:10:01Z | |
| dc.date.available | 2005-08-15T17:10:01Z | |
| dc.date.issued | 1992 | en_US |
| dc.identifier.uri | http://hdl.handle.net/1721.1/13236 | |
| dc.description | Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1992. | en_US |
| dc.description | Includes bibliographical references (leaves 160-164). | en_US |
| dc.description.statementofresponsibility | by Charles William Selvidge. | en_US |
| dc.format.extent | 164 leaves | en_US |
| dc.format.extent | 18019234 bytes | |
| dc.format.extent | 18018992 bytes | |
| dc.format.mimetype | application/pdf | |
| dc.format.mimetype | application/pdf | |
| dc.language.iso | eng | en_US |
| dc.publisher | Massachusetts Institute of Technology | en_US |
| dc.rights | M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. | en_US |
| dc.rights.uri | http://dspace.mit.edu/handle/1721.1/7582 | |
| dc.subject | Electrical Engineering and Computer Science | en_US |
| dc.title | Compilation-based prefetching for memory latency tolerance | en_US |
| dc.type | Thesis | en_US |
| dc.description.degree | Ph.D. | en_US |
| dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | |
| dc.identifier.oclc | 26912419 | en_US |