A hierarchical scheduling policy applied to printed circuit board assembly

Author(s)
Massachusetts Institute of Technology. Laboratory for Information and Decision Systems.; Gershwin, S. B.
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Description
Bibliography: leaf 12.
 
"September, 1984."
 
Date issued
1984
URI
http://hdl.handle.net/1721.1/1335
Publisher
Massachusetts Institute of Technology, Laboratory for Information and Decision Systems
Series/Report no.
LIDS-R ; 1395
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