Show simple item record

dc.contributor.advisorPerreault, David J.
dc.contributor.advisorLam, Hylas
dc.contributor.authorMurray, Elizabeth K.
dc.date.accessioned2022-01-14T14:44:53Z
dc.date.available2022-01-14T14:44:53Z
dc.date.issued2021-06
dc.date.submitted2021-06-17T20:13:54.206Z
dc.identifier.urihttps://hdl.handle.net/1721.1/139017
dc.description.abstractMOSFET gate drivers are important in modern power electronics due to the ubiquity of applications that require the fast and controlled switching of power MOSFETs. A controller serves as the first building block in many such systems, but with limited drive current and logic level voltage signals, it is unable to directly turn on a discrete power MOSFET. Gate drivers serve as the critical interface between the controller output and the power MOSFET. This thesis explores some of the considerations in designing a gate driver for hardswitching applications and presents a new design for an area-efficient integrated gate driver. Simulation results show that, for a given die area, the new design gives better performance than existing topologies.
dc.publisherMassachusetts Institute of Technology
dc.rightsIn Copyright - Educational Use Permitted
dc.rightsCopyright MIT
dc.rights.urihttp://rightsstatements.org/page/InC-EDU/1.0/
dc.titleDesign of Area-Efficient Integrated Gate Drivers
dc.typeThesis
dc.description.degreeM.Eng.
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
mit.thesis.degreeMaster
thesis.degree.nameMaster of Engineering in Electrical Engineering and Computer Science


Files in this item

Thumbnail

This item appears in the following Collection(s)

Show simple item record