| dc.contributor.advisor | Perreault, David J. | |
| dc.contributor.advisor | Lam, Hylas | |
| dc.contributor.author | Murray, Elizabeth K. | |
| dc.date.accessioned | 2022-01-14T14:44:53Z | |
| dc.date.available | 2022-01-14T14:44:53Z | |
| dc.date.issued | 2021-06 | |
| dc.date.submitted | 2021-06-17T20:13:54.206Z | |
| dc.identifier.uri | https://hdl.handle.net/1721.1/139017 | |
| dc.description.abstract | MOSFET gate drivers are important in modern power electronics due to the ubiquity of applications that require the fast and controlled switching of power MOSFETs. A controller serves as the first building block in many such systems, but with limited drive current and logic level voltage signals, it is unable to directly turn on a discrete power MOSFET. Gate drivers serve as the critical interface between the controller output and the power MOSFET.
This thesis explores some of the considerations in designing a gate driver for hardswitching applications and presents a new design for an area-efficient integrated gate driver. Simulation results show that, for a given die area, the new design gives better performance than existing topologies. | |
| dc.publisher | Massachusetts Institute of Technology | |
| dc.rights | In Copyright - Educational Use Permitted | |
| dc.rights | Copyright MIT | |
| dc.rights.uri | http://rightsstatements.org/page/InC-EDU/1.0/ | |
| dc.title | Design of Area-Efficient Integrated Gate Drivers | |
| dc.type | Thesis | |
| dc.description.degree | M.Eng. | |
| dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | |
| mit.thesis.degree | Master | |
| thesis.degree.name | Master of Engineering in Electrical Engineering and Computer Science | |