Puppetmaster: a certified hardware architecture for task parallelism

Abstract

This thesis presents Puppetmaster, a hardware accelerator for transactional workloads. Existing software and hardware frameworks for transactional memory and online transaction processing are not able to scale to hundreds or thousands of cores unless the rate of conflicts between transactions is very low. Puppetmaster aims to improve upon the scalability of concurrency control by requiring transactions to declare their read and write sets in advance and uses this information to only run transactions concurrently when they are known not to conflict. In this thesis, I present and evaluate the design of Puppetmaster in a high-level model, in cycle-accurate simulations, and on real reconfigurable hardware.