Preliminary Investigation of Productivity Tools for Memory Profiling in Parallel Programs

Abstract

As computing efficiency becomes constrained by hardware scaling limitations, code optimization grows increasingly important as an area of research. The impact of certain optimizations depends on whether a program is compute-bound or memory-bound. Memory-bound computations especially benefit from program transformations that improve their data locality, to better exploit modern memory hierarchies. Reuse distance is a useful measure for analyzing data locality in an architecture-agnostic way, i.e., independent of specific cache sizes. Previous work has researched different ways to calculate reuse distance, ranging from deterministic to probabilistic and using different definitions of reuse distance.

This thesis investigates the use of static compiler instrumentation tools to implement memory analysis tools for parallel programs. I show how the comprehensive static instrumentation (CSI) framework can be used to compute the reuse-distance of memory locations in a sequential execution of a program. For analyzing parallel programs, it is necessary to contextualize the memory access patterns with the logical parallel structure of the code. To this end, I show how reuse distance calculations can be organized according to the logical parallel structure of the program by building a series-parallel tree using CSI. I present several potential algorithms for using this instrumentation to calculate statistics for average and peak memory bandwidth in parallel codes. Although these instrumentation tools remain prototypes, they constitute a compelling proof-of-concept for the use of CSI to perform memory analysis in parallel codes.