| dc.description.abstract | Data communication relies on interconnects between circuit elements on a chip as well as between chips. As feature sizes decrease for silicon (Si) complementary metal oxide semiconductor (CMOS) transistors, electrical interconnects face increasing delay and increasing power consumption. Photonic interconnects can ameliorate issues with power consumption by removing heat dissipation and allowing for higher bandwidths and higher degrees of multiplexing. Germanium (Ge)’s absorption in the Telecom wavelength range (1.3-1.55 µm), its transparency in the mid-longwave infrared (mid-LWIR) range, and its ease of integration on a Si backbone make it a perfect candidate for photodetectors (PDs) for Telecom optical interconnects and waveguides for mid-LWIR optical sensors. However, optical interconnects are still larger than electrical interconnects, motivating the move to vertical integration of photonic devices. In order to achieve vertical integration, interconnects must be integrated in the back-end-of-line (BEOL) of a CMOS process flow. BEOL integration introduces strict temperature requirements of T<450°C to prevent metal diffusion and oxidation of devices already on-chip.
First, this thesis tackles BEOL-compatible active devices such as Ge-on-Si PDs for the near-IR wavelength range. We developed a BEOL-compatible process flow for Ge on Si epitaxy. Investigating strain in our low-temperature Ge led to a discovery of a residual compressive strain at extended temperature regimes compared to prior work. Based on this residual compressive strain, a model is proposed for misfit dislocation nucleation in Ge-on-Si epitaxy. Point defects and dislocation kinetics prevalent in low temperature growth of Ge are characterized and analyzed via post-processing annealing. The impact of these defects and processing conditions on Ge-on-Si photodetector device performance is also explored. We found that acceptor-like point defects identified via Hall effect are responsible for conductivity type conversion via low temperature post-processing. These point defects impact Ge-on-Si PDs' internal quantum efficiency, while dislocations appear to dominate device leakage current. We also found that effective sidewall passivation, a remote heterojunction structure, and post-processing annealing of Ge-on-Si PDs result in the lowest reported dark current density for Ge-on-Si PDs, 160 nA/cm². Lastly, BEOL-compatible passive Ge devices for mid-IR-LWIR sensing applications are investigated. Room temperature-evaporated amorphous Ge on FZ-Si waveguides demonstrate transmission loss of 15 dB/cm at 9.79µm wavelength, which is a promising start for room temperature-evaporated Ge waveguides. | |
