| dc.contributor.author | Courtemanche, Anthony James. | en_US |
| dc.contributor.other | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science. | en_US |
| dc.date.accessioned | 2005-08-08T20:12:35Z | |
| dc.date.available | 2005-08-08T20:12:35Z | |
| dc.date.copyright | 1987 | en_US |
| dc.date.issued | 1987 | en_US |
| dc.identifier.uri | http://hdl.handle.net/1721.1/14833 | en_US |
| dc.description | Thesis: M.S., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 1987 | en_US |
| dc.description | Bibliography: leaves 105-107. | en_US |
| dc.description.statementofresponsibility | by Anthony James Courtemanche. | en_US |
| dc.format.extent | 117 leaves | en_US |
| dc.publisher | Massachusetts Institute of Technology | en_US |
| dc.rights | MIT theses may be protected by copyright. Please reuse MIT thesis content according to the MIT Libraries Permissions Policy, which is available through the URL provided. | en_US |
| dc.rights.uri | http://dspace.mit.edu/handle/1721.1/7582 | en_US |
| dc.subject | Electrical Engineering and Computer Science. | en_US |
| dc.title | A lisp-oriented multiprocessor architecture for digital parity simulation | en_US |
| dc.type | Thesis | en_US |
| dc.description.degree | M.S. | en_US |
| dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | en_US |
| dc.identifier.oclc | 17597902 | en_US |
| dc.description.collection | M.S. Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science | en_US |
| dspace.imported | 2023-04-21T20:20:25Z | en_US |
