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dc.contributor.advisorLance A. Glasser.en_US
dc.contributor.authorMatson, Mark Douglasen_US
dc.contributor.otherMassachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.en_US
dc.date.accessioned2005-08-05T20:56:42Z
dc.date.available2005-08-05T20:56:42Z
dc.date.copyright1985en_US
dc.date.issued1985en_US
dc.identifier.urihttp://hdl.handle.net/1721.1/15287
dc.descriptionThesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1985.en_US
dc.descriptionMICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERING.en_US
dc.descriptionIncludes bibliographical references.en_US
dc.description.statementofresponsibilityby Mark Douglas Matson.en_US
dc.format.extent106 leavesen_US
dc.format.extent6819681 bytes
dc.format.extent6819441 bytes
dc.format.mimetypeapplication/pdf
dc.format.mimetypeapplication/pdf
dc.language.isoengen_US
dc.publisherMassachusetts Institute of Technologyen_US
dc.rightsM.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.en_US
dc.rights.urihttp://dspace.mit.edu/handle/1721.1/7582
dc.subjectElectrical Engineering and Computer Science.en_US
dc.titleMacromodeling and optimization of digital MOS VLSI circuitsen_US
dc.typeThesisen_US
dc.description.degreePh.D.en_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
dc.identifier.oclc13620122en_US


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