Parameterized Relaxations for Circuits and Graphs
Author(s)
Akmal, Shyan
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Advisor
Williams, Virginia Vassilevska
Williams, Ryan
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Whatmakessomeproblemshardtosolve, and others easy? In situations where complexitytheoretic hypotheses rule out the possibility of fast algorithms for problems, are there nonetheless instances for which we can evade intractability and still design efficient algorithms? In this thesis, we investigate these questions from the perspective of parameterized relaxations. We consider important computational problems on circuits and graphs, and design fast algorithms for relaxed versions of these tasks, that highlight tractable instances of problems which are provably hard in general.
On circuits, we tackle the Majority-SAT problem, a task related to counting solutions to Boolean formulas in conjunctive normal form (i.e., CNF formulas), which has been extensively studied in areas related to probabilistic planning and inference. It has been known since the problem’s introduction in the 1970s that Majority-SAT is complete for the class PP(intuitively, the complexity class of decision versions of counting tasks, believed to contain very difficult problems), and so under standard conjectures in complexity theory, cannot be solved in polynomial-time. We nonetheless show however, that Majority-SAT can be solved in optimal linear time when its inputs are restricted to be k-CNF formulas (i.e., CNF formulas where every clause width at most k), for any constant integer k ≥ 1. This is surprising, since most circuit satisfiability problems remain hard even when restricted to 3-CNF formulas. Indeed, prior to our work, it was widely conjectured that Majority-SAT should be PP-complete on 3-CNFs. Beyond overturning this conjecture, we also characterize the complexity of many additional variants of Majority-SAT on bounded width formulas.
On graphs, we tackle the All-Pairs Connectivity and Disjoint Shortest Paths problems. In the All-Pairs Connectivity (APC) problem, we are given an unweighted, directed graph G on n vertices, and are tasked with computing the maximum flow between each pair of vertices in G. Despite significant research on the problem, the fastest algorithm for APC in dense directed graphs is the naive n⁴⁺ᵒ⁽¹⁾ time approach, which simply runs a fast maximum f low algorithm separately for each pair of nodes. Moreover, the Strong Exponential Time Hypothesis (SETH) implies that APC cannot be solved in truly subcubic time. We consider a relaxation of APC, the k-Bounded All-Pairs Connectivity (k-APC), problem for integer k ≥ 1, where for each pair of nodes (s,t) in G, we must compute the maximum flow from s to t exactly if the maximum flow value is less than k, but if the maximum flow is at least k we merely need to report that the flow value is “large” instead of computing its exact value. We present an algorithm solving k-APC in Ō((kn)ʷ) time, where ω < 2.3716 is the exponent of matrix multiplication. This is subcubic even for small k (evading the SETH lower bound for the general APC problem), and runs in Ō(nʷ) time for all constant k, which is already optimal for the 1-APC problem under conjectures in fine-grained complexity. Before our work, no algorithm was even known for 3-APC that ran faster than an algorithm simply solving the general APC problem directly.
In the Disjoint Shortest Paths (DSP) problem, we are given a graph G on n vertices, with specified source nodes s₁,...,sₖ and target nodes t₁,...,tₖ, and are tasked with determining if G contains internally vertex-disjoint sᵢ ⇝ tᵢ shortest paths. This problem is NP-hard in general, if k can grow with n. We study k-DSP, the DSP problem parameterized by the number of terminal pairs, for small k. We show that 2-DSP can be solved in optimal linear time over weighted undirected graphs and directed acyclic graphs. Prior to our work, the fastest algorithm for 2-DSP over weighted undirected graphs took O(n⁷) time, and the fastest algorithm over weighted, dense directed acyclic graphs took O(n³) time.
Date issued
2024-05Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer SciencePublisher
Massachusetts Institute of Technology