Intelligent field emission arrays

Abstract

Field emission arrays (FEAs) have been studied extensively as potential electron sources for a number of vacuum microelectronic device applications. For most applications, temporal current stability and spatial current uniformity are major concerns. Using the kinetic model of electron emission, field emission can be described as two sequential processes- the flux of electrons to the tip surface followed by the transmission of the electrons through the surface barrier. Either of these processes could be the determinant of the emission current. Unstable emission current is usually due to absorption/desorption of gas molecules on the tip surface (barrier height variation) and non-uniform emission is usually due to tip radius variation (barrier width change). These problems could be solved if the emission current is determined by the electron supply to the surface instead of the electron transmission through the surface barrier. In this thesis, we used the inversion layer of a MOSFET to control the electron supply. It results in additional benefits of low turn-on voltage and low voltage swing to turn the device on and off. A novel CMP-based process for fabricating integrated LD-MOSFET/FEA is presented. We obtained FEA devices with an extraction gate aperture of 1.3 [mu]m and emitter height of 1 [mu]m. We present a comprehensive study of field emitter arrays with or without MOSFET. The silicon field emitter shows turn-on voltage of [approximately]24 V with field enhancement factor (b[sub]FN) of [approximately]370. We demonstrated that the LD-MOSFET provides excellent control of emission current. The threshold voltage of the LD-MOSFET is [approximately]0.5V. The integrated device can be switched ON and OFF using a MOSFET gate voltage swing of 0.5V. This results in an ON/OFF current ratio of 1000:1. The current fluctuation is significantly reduced when the MOSFET is integrated with the FEA device and the device is operated in the MOSFET control regime. The emission current of the integrated LD-MOSFET/FEA remains stable regardless the gas and vacuum condition. The saturation current level of the integrated devices in the MOSFET controlled region is also the same regardless the emitter array size or the FEA's position on the wafer. We also present a comprehensive study of three-dimensional oxidation in silicon emitter tip

(cont.) formation. Stress plays an important role in the oxidation mechanism. A new sharp emitter tip formation mechanism is proposed: rather than a continuous oxidation process, an emitter neck breaking stage occurs before the sharp emitter tip is formed. Stress from volume difference of silicon and silicon dioxide is the main cause for the emitter neck breaking. Initial formation of microcracks around the neck occurs at high temperature due to volume difference stress, oxide grows into the cracks right after crack formation, and a sharp emitter tip is then formed by further oxidation.