Silicon carbide process development for microengine applications : residual stress control and microfabrication

Abstract

The high power densities expected for the MIT microengine (silicon MEMS-based micro-gas turbine generator) require the turbine and compressor spool to rotate at a very high speed at elevated temperatures (1300 to 1700 K). However, the thermal softening of silicon (Si) at temperatures above 900 K limits the highest achievable operating temperatures, which in turn significantly compromises the engine efficiency. Silicon carbide (SiC) offers great potential for improved microengine efficiency due to its high stiffness, strength, and resistance to oxidation at elevated temperatures. However, techniques for microfabricating SiC to the high level of precision needed for the microengine are not currently available. Given the limitations imposed by the SiC microfabrication difficulties, this thesis proposed Si-SiC hybrid turbine structures, explores key process steps, identified, and resolved critical problems in each of the processes along with a thorough characterization of the microstructures, mechanical properties, and composition of CVD SiC. Three key process steps for the Si-SiC hybrid structures are CVD SiC deposition on silicon wafers, wafer-level SiC planarization, and Si-to-SiC wafer bonding. Residual stress control in SiC coatings is of the most critical importance to the CVD process itself as well as to the subsequent wafer planarization, and bonding processes since residual stress-induced wafer bow increases the likelihood of wafer cracking significantly. Based on CVD parametric studies performed to determine the relationship between residual stresses in SiC and H2/MTS ratio, deposition temperature, and HCl/MTS ratio, very low residual stress (less than several tens of MPa) in thick CVD SiC coatings (up to -50 pm) was achieved.

(cont.) In the course of the residual stress study, a general method for stress quantification was developed to isolate the intrinsic stress from the thermal stress. In addition, qualitative explanations for the residual stress generation are also offered, which are in good agreement with experimental results. In the post-CVD processes, the feasibility of SiC wafer planarization and Si-to-SiC wafer bonding processes have successfully been demonstrated, where CVD oxide was used as an interlayer bonding material to overcome the roughness of SiC surface. Finally, the bonding interface of the Si-SiC hybrid structures with oxide interlayer was verified to retain its integrity at high temperatures through four-point flexural tests.