Now showing items 604-623 of 762

    • Safe Open-Nested Transactions Through Ownership 

      Agrawal, Kunal; Lee, I-Ting Angelina; Sukha, Jim (2008-02-20)
      Researchers in transactional memory (TM) have proposed open nesting asa methodology for increasing the concurrency of a program. The ideais to ignore certain "low-level" memory operations of anopen-nested transaction when ...
    • Scalable directoryless shared memory coherence using execution migration 

      Lis, Mieszko; Shim, Keun Sup; Cho, Myong Hyon; Khan, Omer; Devadas, Srinivas (2010-11-22)
      We introduce the concept of deadlock-free migration-based coherent shared memory to the NUCA family of architectures. Migration-based architectures move threads among cores to guarantee sequential semantics in large ...
    • A Scalable Information Theoretic Approach to Distributed Robot Coordination 

      Julian, Brian J.; Angermann, Michael; Schwager, Mac; Rus, Daniela (2011-09-25)
      This paper presents a scalable information theoretic approach to infer the state of an environment by distributively controlling robots equipped with sensors. The robots iteratively estimate the environment state using a ...
    • Scalable Information-Sharing Network Management 

      Guo, Nina X. (2011-06-07)
      This thesis analyzes scalable information-sharing network management. It looks into one of the large problems in network management today: finding information across different network domains. Information-sharing network ...
    • Scalable Internet Routing on Topology-Independent Node Identities 

      Ford, Bryan (2003-10-31)
      Unmanaged Internet Protocol (UIP) is a fully selforganizingnetwork-layer protocol that implements scalableidentity-based routing. In contrast with addressbasedrouting protocols, which depend for scalability oncentralized ...
    • Scalar Operand Networks: Design, Implementation, and Analysis 

      Taylor, Michael Bedford; Lee, Walter; Amarasinghe, Saman; Agarwal, Anant (2004-06-08)
      The bypass paths and multiported register files in microprocessors serve as an implicit interconnect tocommunicate operand values among pipeline stages and multiple ALUs. Previous superscalar designs implementedthis ...
    • Scale Control Processor Test-Chip 

      Batten, Christopher; Krashinsky, Ronny; Asanovic, Krste (2007-01-12)
      We are investigating vector-thread architectures which provide competitive performance and efficiency across a broad class of application domains. Vector-thread architectures unify data-level, thread-level, and instruction-level ...
    • Scene Classification with a Biologically Inspired Method 

      Terashima, Yoshito (2009-05-10)
      We present a biologically motivated method for scene image classification. The core of the method is to use shape based image property that is provided by a hierarchical feedforward model of the visual cortex [18]. Edge ...
    • Schematic Querying of Large Tracking Databases 

      Dalley, Gerald; Izo, Tomas (2006-06-12)
      In dealing with long-term tracking databases withwide-area coverage, an important problem is in formulating anintuitive and fast query system for analysis. In such a querysystem, a user who is not a computer vision research ...
    • Scoop: An Adaptive Indexing Scheme for Stored Data in Sensor Networks 

      Gil, Thomer M.; Madden, Samuel (2006-11-27)
      In this paper, we present the design of Scoop, a system for indexing and querying stored data in sensor networks. Scoop works by collecting statistics about the rate of queries and distribution of sensor readings over a ...
    • SE-Sync: A Certifiably Correct Algorithm for Synchronization over the Special Euclidean Group 

      Rosen, David M.; Carlone, Luca; Bandeira, Afonso S.; Leonard, John J. (2017-02-05)
      Many important geometric estimation problems naturally take the form of synchronization over the special Euclidean group: estimate the values of a set of unknown poses given noisy measurements of a subset of their pairwise ...
    • Secondary Structure Prediction of All-Helical Proteins Using Hidden Markov Support Vector Machines 

      Gassend, B.; O'Donnell, C. W.; Thies, W.; Lee, A.; van Dijk, M.; e.a. (2005-10-06)
      Our goal is to develop a state-of-the-art predictor with an intuitive and biophysically-motivated energy model through the use of Hidden Markov Support Vector Machines (HM-SVMs), a recent innovation in the field of machine ...
    • Secure Program Execution Via Dynamic Information Flow Tracking 

      Suh, G. Edward; Lee, Jaewook; Zhang, David; Devadas, Srinivas (2003-07-21)
      We present a simple architectural mechanism called dynamicinformation flow tracking that can significantly improve thesecurity of computing systems with negligible performanceoverhead. Dynamic information flow tracking ...
    • Securing Deployed RFIDs by Randomizing the Modulation and the Channel 

      Wang, Jue; Hassanieh, Haitham; Katabi, Dina; Kohno, Tadayoshi (2013-01-12)
      RFID cards are widely used today in sensitive applications such as access control, payment systems, and asset tracking. Past work shows that an eavesdropper snooping on the communication between a card and its legitimate ...
    • SEEC: A Framework for Self-aware Computing 

      Hoffmann, Henry; Maggio, Martina; Santambrogio, Marco D.; Leva, Alberto; Agarwal, Anant (2010-10-13)
      As the complexity of computing systems increases, application programmers must be experts in their application domain and have the systems knowledge required to address the problems that arise from parallelism, power, ...
    • SEEC: A Framework for Self-aware Management of Multicore Resources 

      Hoffmann, Henry; Maggio, Martina; Santambrogio, Marco D.; Leva, Alberto; Agarwal, Anant (2011-03-24)
      This paper presents SEEC, a self-aware programming model, designed to reduce programming effort in modern multicore systems. In the SEEC model, application programmers specify application goals and progress, while systems ...
    • SEEC: A General and Extensible Framework for Self-Aware Computing 

      Hoffmann, Henry; Maggio, Martina; Santambrogio, Marco D.; Leva, Alberto; Agarwal, Anant (2011-11-07)
      Modern systems require applications to balance competing goals, e.g. achieving high performance and low power. Achieving this balance places an unrealistic burden on application programmers who must understand the power ...
    • Selecting Refining and Evaluating Properties for Program Analysis 

      Dodoo, Nii; Lin, Lee; Ernst, Michael D. (2003-07-21)
      This research proposes and evaluates techniques for selectingpredicates for conditional program properties—thatis, implications such as p ) q whose consequent must betrue whenever the predicate is true. Conditional ...
    • Selecting Relevant Genes with a Spectral Approach 

      Wolf, Lior; Shashua, Amnon; Mukherjee, Sayan (2004-01-27)
      Array technologies have made it possible to record simultaneouslythe expression pattern of thousands of genes. A fundamental problemin the analysis of gene expression data is the identification ofhighly relevant genes that ...
    • Selective Vectorization for Short-Vector Instructions 

      Amarasinghe, Saman; Rabbah, Rodric; Larsen, Samuel (2009-12-18)
      Multimedia extensions are nearly ubiquitous in today's general-purpose processors. These extensions consist primarily of a set of short-vector instructions that apply the same opcode to a vector of operands. Vector ...