A Raw processor interface to an 802.11b/g RF front end
Author(s)
Walker, Benjamin Philip Eugene Zaks
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Other Contributors
Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
Advisor
Anant Agarwal.
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Show full item recordAbstract
The Raw microprocessor is a tiled architecture processor designed by the Computer Architecture Group at MIT. Raw was designed in part to be extremely good at performing streaming-type algorithms such as those found in wireless communications processing. This thesis describes the design and implementation of an interface between the Raw microprocessor and a modified 802.11a/b/g wireless access point. Combined with the Raw processor, this interface replaces a custom digital chip in the access point. The interface can be used with the Raw microprocessor to perform communications research, and as a system demonstrating Raw's capabilities. The interface has been built, tested, and functionally qualified.
Description
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2004. Includes bibliographical references (p. 95-96).
Date issued
2004Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer SciencePublisher
Massachusetts Institute of Technology
Keywords
Electrical Engineering and Computer Science.