Integrated thin film batteries on silicon

Abstract

Monolithic integration has been implemented successfully in complementary metal oxide semiconductor (CMOS) technology and led to improved device performance, increased reliability, and overall cost reduction. The next element to be incorporated on the silicon chip is the power unit; possibly as part of the back end process of the very large scale integrated (VLSI) circuits' production. This thesis describes the work done in developing and studying thin film integrated lithium ion batteries compatible with microelectronics with respect to the material system employed, the cells' fabrication methods, and performance. The project consisted of three stages; first, a material system new to the battery application field was explored and power cells were fabricated and characterized. In the second stage, the fabrication process of the first material system cells was optimized thereby improving their performance. The third stage dealt with a more conventional battery material system, utilizing thin film technology to fabricate and explore power cells.

(cont.) All the cells fabricated in this work were created using microelectronic technology and were characterized by thin film analysis techniques and by measurement equipment commonly used for microelectronic device testing. The cells were fabricated in four sizes of active areas: 5x5 mm², 2x2 mm², lxl mm², and 0.5x0.5 mm². The first material system consisted of a novel lithium-free electrolyte in the form of an ultra-thin SiO₂ layer, thermally grown from sacrificial polysilicon layer on a doped polysilicon anode. The concept of SiO₂ as an electrolyte is innovative since common solid state lithium and lithium ion batteries consist of 1-2 ptm thick lithium-containing electrolytes. The controlled transport of lithium through SiO₂, 9-40 nm thick, was studied for electrolyte application. The fabricated LiCoO₂/SiO₂/polysilicon cells were successfully charged and discharged. This stage of the project demonstrated the concept of an ultra-thin lithium free electrolyte layer and introduces SiO₂ as an interesting candidate material. The second stage of the project focused on improving the LiCoO₂/SiO₂/polysilicon cell's performance and optimizing its fabrication process.

(cont.) Chemical mechanical polishing (CMP), a typical planarization method in microelectronics, new to the battery application field, was introduced in order to enhance the cell's properties and performance. LiCoO₂/SiO₂/polysilicon cells consisting of Si0₂ layers 7-40 nm thick were studied. Cells with the planarized polysilicon anode were characterized and the planarization effect was evaluated. This stage demonstrates the importance of interfacial quality in thin film batteries and the advantages incorporation of CMP as a planarization step in the fabrication process. Finally, the third stage of the project focused on applying the thin film technology knowledge and expertise to a more commonly used material system V₂0₅/LiPON/LiCoO₂. With the aim of reducing interfacial roughness, a surface morphology study of V₂0₅ was performed, tailoring different deposition conditions and surface morphology. Implementing the optimized conditions obtained from this analysis, a V₂0₅/LiPON/LiCoO₂ rocking-chair battery was studied next. The cells consisted of approximately 100 or 350 nm thick lithium phosphorus oxynitride (LiPON) electrolyte.

(cont.) This stage demonstrated the advantage of thin film technology in reducing film thickness and the performance enhancement achieved. The work described in this thesis approached the thin film battery subject from the microelectronic perspective, in order to "bring the battery into the clean room".