| dc.contributor.advisor | Stephen A. Ward. | en_US |
| dc.contributor.author | McLellan, Hubert Rae | en_US |
| dc.contributor.other | Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. | en_US |
| dc.date.accessioned | 2007-01-10T15:48:35Z | |
| dc.date.available | 2007-01-10T15:48:35Z | |
| dc.date.issued | 1983 | en_US |
| dc.identifier.uri | http://hdl.handle.net/1721.1/35328 | |
| dc.description | Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1983. | en_US |
| dc.description | MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERING | en_US |
| dc.description | Includes bibliographical references. | en_US |
| dc.description.statementofresponsibility | by Hubert Rae McLellan, Jr. | en_US |
| dc.format.extent | 50 leaves | en_US |
| dc.format.extent | 2316080 bytes | |
| dc.format.extent | 2315888 bytes | |
| dc.format.mimetype | application/pdf | |
| dc.format.mimetype | application/pdf | |
| dc.language.iso | eng | en_US |
| dc.publisher | Massachusetts Institute of Technology | en_US |
| dc.rights | M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. | en_US |
| dc.rights.uri | http://dspace.mit.edu/handle/1721.1/7582 | |
| dc.subject | Electrical Engineering and Computer Science. | en_US |
| dc.title | Instruction prefetch strategies in a pipelined processor | en_US |
| dc.type | Thesis | en_US |
| dc.description.degree | M.S. | en_US |
| dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | |
| dc.identifier.oclc | 11605774 | en_US |
