Browsing Advanced Materials for Micro- and Nano-Systems (AMMNS) by Subject "bonding"

Now showing items 1-3 of 3

    • Preliminary Characterisation of Low-Temperature Bonded Copper Interconnects for 3-D Integrated Circuits 

      Leong, Hoi Liong; Gan, C.L.; Pey, Kin Leong; Tsang, Chi-fo; Thompson, Carl V.; e.a. (2005-01)
      Three dimensional (3-D) integrated circuits can be fabricated by bonding previously processed device layers using metal-metal bonds that also serve as layer-to-layer interconnects. Bonded copper interconnects test structures ...

    • SiGe-On-Insulator (SGOI) Technology and MOSFET Fabrication 

      Cheng, Zhiyuan; Fitzgerald, Eugene A.; Antoniadis, Dimitri A. (2002-01)
      In this work, we have developed two different fabrication processes for relaxed Si₁₋xGex-on-insulator (SGOI) substrates: (1) SGOI fabrication by etch-back approach, and (2) by "smart-cut" approach utilizing ...

    • SiGe-On-Insulator (SGOI): Two Structures for CMOS Application 

      Cheng, Zhiyuan; Jung, Jongwan; Lee, Minjoo L.; Nayfeh, Hasan; Pitera, Arthur J.; e.a. (2003-01)
      Two SiGe-on-insulator (SGOI) structures for CMOS application are presented: surface-channel strained-Si on SGOI (SSOI) and dual-channel SGOI structures. Comparisons between two structures are made from both device performance ...