Now showing items 1-4 of 4
Fabrication of Highly Ordered Nanoparticle Arrays Using Thin Porous Alumina Masks
Highly ordered nanoparticle arrays have been successfully fabricated by our group recently using ultra-thin porous alumina membranes as masks in the evaporation process. The sizes of the nanoparticles can be adjusted from ...
Strained Ge channel p-type metal-oxide-semiconductor field-effect transistors grown on SiââxGex/Si virtual substrates
We have fabricated strained Ge channel p-type metal-oxide-semiconductor field-effect transistors (p-MOSFETs) on Siâ.âGeâ.â virtual substrates. The poor interface between silicon dioxide (SiOâ) and the Ge channel ...
MOSFET Channel Engineering using Strained Si, SiGe, and Ge Channels
Biaxial tensile strained Si grown on SiGe virtual substrates will be incorporated into future generations of CMOS technology due to the lack of performance increase with scaling. Compressively strained Ge-rich alloys with ...
High hole and electron mobilities using Strained Si/Strained Ge heterostructures
PMOS and NMOS mobility characteristics of the dual channel (strained Si/strained Ge) heterostructure have been reviewed. It is shown that the dual channel heterostructure can provide substantially enhanced mobilities for ...