Search
Now showing items 1-8 of 8
Novel CMOS-Compatible Optical Platform
(2003-01)
A research synopsis is presented summarizing work with integration of Ge and III-V semiconductors and optical devices with Si. III-V GaAs/AlGaAs quantum well lasers and GaAs/AlGaAs optical circuit structures have been ...
Laser Fabrication by Using Photonic Crystal
(2003-01)
This paper involves the calculation for composition of different layer used in laser structure and the simulation of cavity, formed by creating air columns in the InGaAsP medium, for square lattice. The aim of this project ...
Formation of Nanocrystalline Germanium via Oxidation of Si₀.₅₄Ge₀.₄₆ for Memory Device Applications
(2003-01)
In this work, we studied the possibility of synthesizing nanocrystalline germanium (Ge) via dry and wet oxidation of both amorphous and polycrystalline Si₀.₅₄Ge₀.₄₆ films. In dry oxidation, Ge was rejected from the growing ...
The interfacial reaction of Ni on (100) Si₁âxGex (x=0, 0.25) and (111) Ge
(2003-01)
The interfacial reaction of Ni with Si, Si₀.₇₅Ge₀.₂₅, and Ge at 400°C has been investigated. A uniform epitaxial NiSi film was obtained at 400°C for Ni-Silicidation on Si using rapid thermal annealing method. Similarly, ...
MOSFET Channel Engineering using Strained Si, SiGe, and Ge Channels
(2003-01)
Biaxial tensile strained Si grown on SiGe virtual substrates will be incorporated into future generations of CMOS technology due to the lack of performance increase with scaling. Compressively strained Ge-rich alloys with ...
SiGe-On-Insulator (SGOI): Two Structures for CMOS Application
(2003-01)
Two SiGe-on-insulator (SGOI) structures for CMOS application are presented: surface-channel strained-Si on SGOI (SSOI) and dual-channel SGOI structures. Comparisons between two structures are made from both device performance ...
Charge Storage Mechanism and Size Control of Germanium Nanocrystals in a Tri-layer Insulator Structure of a MIS Memory Device
(2003-01)
A method of synthesizing and controlling the size of germanium nanocrystals is developed. A tri-layer metal-insulator-semiconductor (MIS) memory device structure comprising of a thin (~5nm) silicon dioxide (SiO₂) ...
Graded InGaN Buffers for Strain Relaxation in GaN/InGaN Epilayers Grown on sapphire
(2003-01)
Graded InGaN buffers were employed to relax the strain arising from the lattice and thermal mismatch in GaN/InGaN epilayers grown on sapphire. An enhanced strain relaxation was observed in GaN grown on a stack of five InGaN ...