| dc.contributor.advisor | Srinivas Devadas. | en_US |
| dc.contributor.author | Rinderknecht, William John | en_US |
| dc.date.accessioned | 2007-03-12T17:29:26Z | |
| dc.date.available | 2007-03-12T17:29:26Z | |
| dc.date.copyright | 1994 | en_US |
| dc.date.issued | 1995 | en_US |
| dc.identifier.uri | http://hdl.handle.net/1721.1/36543 | |
| dc.description | Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1995. | en_US |
| dc.description | Includes bibliographical references (p. 61-62). | en_US |
| dc.description.statementofresponsibility | by William John Rinderknecht. | en_US |
| dc.format.extent | 62 p. | en_US |
| dc.language.iso | eng | en_US |
| dc.publisher | Massachusetts Institute of Technology | en_US |
| dc.rights | M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. | en_US |
| dc.rights.uri | http://dspace.mit.edu/handle/1721.1/7582 | |
| dc.subject | Electrical Engineering and Computer Science | en_US |
| dc.title | A power reduction algorithm for combinatorial CMOS circuits using input disabling | en_US |
| dc.type | Thesis | en_US |
| dc.description.degree | M.S. | en_US |
| dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | |
| dc.identifier.oclc | 32906126 | en_US |
