Authenticated messages for a real-time fault-tolerant computer system
Author(s)
Chau, David Chi-Shing
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Other Contributors
Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
Advisor
Roger Racine and Barbara Liskov.
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This thesis develops a message authentication scheme for a new version of the X-38 Fault-Tolerant Parallel Processor (FTPP), a high-performance real-time computer system designed for applications that need extreme reliability, such as control for human spaceflight. This computer system uses multiple replicated processors to ensure that the system as a whole continues to operate correctly even if some of the processors should fail. In order to maintain a synchronized state, the replicated processors must vote among themselves to make sure that they are using identical data. This thesis adds message authentication to the voting process. Using authenticated messages allows a system to achieve the same level of reliability with fewer replicas. This thesis analyzes where message authentication is needed in the voting process, then presents and evaluates several signature schemes for implementing message authentication. The X-38 FTPP uses radiation-hardened embedded processors, which have relatively limited computational power. Therefore, the challenge is to identify a scheme that is secure enough to guarantee that signatures cannot be forged, yet fast enough to sign messages at a high rate in real time.
Description
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2006. This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections. Includes bibliographical references (p. 111-118).
Date issued
2006Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer SciencePublisher
Massachusetts Institute of Technology
Keywords
Electrical Engineering and Computer Science.