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Ultra-wideband digital baseband

Author(s)
Blázquez-Fernández, Raúl, 1975-
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Alternative title
UWB digital baseband
Other Contributors
Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
Advisor
Anantha P. Chandrakasan.
Terms of use
M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582
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Abstract
The FCC approved the use of Ultra-wideband signals for communication purposes in February 2002 in the band from 3.1GHz to 10.6GHz, effectively opening 7.5GHz of free unlicensed bandwidth. There are two main constraints for the use of this band: a maximum EIRP spectral density of -41.3dBm/MHz and a minimum instantaneous bandwidth of 500MHz. One of the main driving applications of this technology is high data rate communication over short distances. In this thesis two digital baseband receivers for impulse UWB have been designed. The first one was designed for baseband UWB pulses and achieves 193 kbps of wireless communication using impulses of 300 MHz bandwidth and 2% duty cycle, and was part of a system-on-a-chip. The second baseband achieves 100Mbps using impulses of 500 MHz bandwidth in the FCC compliant band, as part of a whole UWB system. Due to its bandwidth the multipath becomes very relevant as the data rate is increased into the range of the hundreds of megabits per second. The current multipath model, used for the development of IEEE standard 802.15.3a is a modified Saleh-Valenzuela model [1] that has a root mean square duration of the impulse response from 5 to 25 ns. The maximum data rate in an UWB system depends on the signal to noise ratio and the multipath.
 
(cont.) The assessment of the quality of the channel and the exposure of several useful knobs in the baseband to control the complexity of the signal processing implemented allows higher levels of the communication hierarchy to fine-tune the receiver, trading off number of operations and power dissipation with quality of service. It includes a MLSE and a RAKE receiver to compensate for multipath. It has been implemented in 0.18 um CMOS technology using National Semiconductors process. The chip has been demonstrated in a wireless system.
 
Description
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2006.
 
Includes bibliographical references (p. 143-152).
 
Date issued
2006
URI
http://hdl.handle.net/1721.1/37895
Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Publisher
Massachusetts Institute of Technology
Keywords
Electrical Engineering and Computer Science.

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