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Modeling the effects of device scaling on field emitter array performance

dc.contributor.advisorTayo Akinwande.en_US
dc.contributor.authorPflug, David Georgeen_US
dc.date.accessioned2008-04-23T14:56:03Z
dc.date.available2008-04-23T14:56:03Z
dc.date.copyright1996en_US
dc.date.issued1996en_US
dc.identifier.urihttp://hdl.handle.net/1721.1/41405
dc.descriptionThesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1996.en_US
dc.descriptionIncludes bibliographical references (p. 89-91).en_US
dc.description.statementofresponsibilityby David George Pflug.en_US
dc.format.extent91 p.en_US
dc.language.isoengen_US
dc.publisherMassachusetts Institute of Technologyen_US
dc.rightsM.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.en_US
dc.rights.urihttp://dspace.mit.edu/handle/1721.1/7582en_US
dc.subjectElectrical Engineering and Computer Scienceen_US
dc.titleModeling the effects of device scaling on field emitter array performanceen_US
dc.typeThesisen_US
dc.description.degreeM.S.en_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
dc.identifier.oclc35968611en_US


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