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On-die signal integrity monitoring of gigabit serial I/Os

Author(s)
Moore, Alexander Wyatt
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Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
Advisor
Vladimir Stojanović and David Rowe.
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M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582
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Abstract
This thesis describes an embedded undersampling system for capturing analog wave-forms and monitoring signal integrity throughout a signal path. It is intended for use in Gigabit serial products, such as crosspoints and other networking products. Design reuse and simple components were the most important design parameters. The system has a small layout, a simple digital interface, and does not require a separate sample-and--hold circuit. The final system has 15 mV minimum resolution, operates over common-mode logic signals from 1.8V to 1.4V, and accurately captures signals up to 2GHz.
Description
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2006.
 
Includes bibliographical references (leaves 93-94).
 
Date issued
2006
URI
http://hdl.handle.net/1721.1/41609
Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Publisher
Massachusetts Institute of Technology
Keywords
Electrical Engineering and Computer Science.

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