Monolithic low phase noise oscillators for moderate frequency applications

Abstract

Low noise oscillators are critical building blocks in a wide range of commercial electronics. Increased levels of integration have created a strong need for integrated oscillator solutions despite generally inferior noise performance. The development of non-linear noise models that can accurately and efficiently predict noise in ring oscillators aids designers in optimizing noise performance in integrated oscillator solutions. Extending a piecewise constant model of noise in an oscillator and the resulting timing jitter reveals how the noise at the oscillator nodes changes during each portion of the cycle. The model can then be used to examine the effects of changing various process and design parameters such as threshold voltages and the effective stage gain. This analysis tool provides a means for designers to evaluate potential improvements of their oscillator design. In some cases approximate analytic solutions can be found that provide better insight into the timing jitter. A simple differential oscillator design illustrates the use of this analysis. The oscillator achieves an analog tuning range of 259MHz-314MHz (extendable with switched capacitors) with a normalized jitter of 102ppm.