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Resolution limits and process latitude of comformable contact nano-lithography

Author(s)
Fucetola, Corey Patrick
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Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
Advisor
David J. Carter and Henry I. Smith.
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M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582
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Abstract
Conformable Contact Lithography enables researchers to attain high-resolution lithographic patterning at manageable cost. This thesis characterizes the minimum resolvable feature size and process latitude of Conformable Contact Lithography. Beginning with a review of current lithographic patterning techniques, choice of Conformable Contract Lithography as an exposure technique is discussed. A design for a trilayer stack that optimizes optical properties is established using experimental and simulated reflectance data to choose appropriate stack film thicknesses. The simulated process latitude is constructed using electromagnetic simulations of grating patterns. Image analysis of experimentally-exposed diffraction grating patterns is described and used to characterize the effect of exposure dose on printed linewidth. The resulting simulated and experimental process latitudes for printed gratings are presented for masks utilizing protruding chrome lines and embedded chrome lines. Experimental and simulated reflectance for single-layer and bilayer film stacks are compared to yield an optimized trilayer stack design of 225nm of anti-reflection-coating chemically separated from the resist by 70nm of evaporated silicon oxide. This design results in less than 1.5% back-reflection from the oxide into the resist for 10% film thickness variation. Finite-difference time-domain simulations are optimized by comparing higher variable-resolution, more realistic simulations to more efficient, lower variable-resolution simulations. Building on the trilayer stack and optimal simulation specification, simulated exposures of diffraction gratings are analyzed assuming a clipping model of development. Exposures of dense grating patterns with two geometries are performed on trilayer-stack-coated silicon wafers for a range of doses.
 
(cont.) Transferred grating patterns are analyzed to establish the effect of exposure dose on printed linewidth. A 5% experimental process latitude is achieved at a printed linewidth tolerance of ±15% for the embedded chrome mask exposures and of 25% for the protruding chrome mask exposures. Within the resist, contrast is higher at smaller gratings using the embedded mask.
 
Description
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2007.
 
Includes bibliographical references (p. 78-80).
 
Date issued
2007
URI
http://hdl.handle.net/1721.1/41640
Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Publisher
Massachusetts Institute of Technology
Keywords
Electrical Engineering and Computer Science.

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