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Packaging solution for VLSI electronic photonic chips

Author(s)
Lee, Chieh-feng
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Alternative title
Packaging solution for Very-Large-Scale-Integration electronic photonic chips
Other Contributors
Massachusetts Institute of Technology. Dept. of Materials Science and Engineering.
Advisor
Lionel C. Kimerling.
Terms of use
M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582
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Abstract
As the demand of information capacity grows, the adoption of optical technology will increase. The issue of resistance and capacitance is limiting the electronic transmission bandwidth while fiber optic delivers data at the speed of light and is only limited by scattering as well as absorption. Electronic-photonic convergence is needed for communication systems to meet the performance requirement. Hence, an increasing number of Very-Large-Scale Integration (VLSI) electronic photonic chips are going to be designed and utilized. However, packaging for the chip is one of the major challenges for optoelectronic industry to overcome due to its high cost and lack of standards. This thesis examines the trend in semiconductor technology and also in the package performance requirement. A transceiver platform to meet the future information capacity demand is proposed by reviewing several materials and devices of current state. Lastly, the package design is demonstrated with the analysis of cost, performance, and materials.
Description
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 2007.
 
Includes bibliographical references.
 
Date issued
2007
URI
http://hdl.handle.net/1721.1/42155
Department
Massachusetts Institute of Technology. Department of Materials Science and Engineering
Publisher
Massachusetts Institute of Technology
Keywords
Materials Science and Engineering.

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