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An all-digital transmitter for pulsed ultra-wideband communication

Author(s)
Mercier, Patrick Philip
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Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
Advisor
Anantha P. Chandrakasan.
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M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582
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Abstract
Applications like sensor networks, medical monitoring, and asset tracking have led to a demand for energy-efficient and low-cost wireless transceivers. These types of applications typically require low effective data rates, thus providing an opportunity to employ simple modulation schemes and aggressive duty-cycling. Due to their inherently duty-cycled nature, pulse-based Ultra-Wideband (UWB) systems are amenable to low-power operation by shutting off circuitry during idle mode between pulses. Furthermore, the use of non-coherent UWB signaling greatly simplifies both transmitter and receiver implementations, offering additional energy savings. This thesis presents an all-digital transmitter designed for a non-coherent pulsed UWB system. By exploiting relaxed center frequency tolerances in non-coherent wideband communication, the transmitter synthesizes UWB pulses from an energy efficient, single-ended digital ring oscillator. Dual capacitively-coupled digital power amplifiers (PAs) are used in tandem to generate bipolar phase modulated pulses for spectral scrambling purposes. By maintaining opposite common modes at the output of these PAs during idle mode (i.e. when no pulses are being transmitted), low frequency turn-on and turn-off transients typically associated with single-ended digital circuits driving single-ended antennas are attenuated by up to 12dB. Furthermore, four level digital pulse shaping is employed to attenuate RF side lobes by up to 20dB. The resulting dual power amplifiers achieve FCC compliant operation in the 3.5, 4.0, and 4.5GHz IEEE 802.15.4a bands without the use of any off-chip filters or large passive components. The transmitter is fabricated in a 90nm CMOS process and requires a core area of 0.07mm2. The entirely digital architecture consumes zero static bias current, resulting in an energy efficiency of 17.5pJ/pulse at data rates up to 15.6Mbps.
Description
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008.
 
Includes bibliographical references (p. 91-96).
 
Date issued
2008
URI
http://hdl.handle.net/1721.1/44732
Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Publisher
Massachusetts Institute of Technology
Keywords
Electrical Engineering and Computer Science.

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