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dc.contributor.advisorNanju Na and Vladimir Stojanovic.en_US
dc.contributor.authorKalantarian, Asaden_US
dc.contributor.otherMassachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.en_US
dc.date.accessioned2009-06-30T17:35:51Z
dc.date.available2009-06-30T17:35:51Z
dc.date.copyright2008en_US
dc.date.issued2008en_US
dc.identifier.urihttp://hdl.handle.net/1721.1/46166
dc.descriptionIncludes bibliographical references (p. 75-79).en_US
dc.descriptionThesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008.en_US
dc.description.abstractContinual increase in high-speed transfer rates is essential in today's world in order to keep up with Moor's law scaling and to meet application demands. This increase in information transfer rates is essentially limited by the bandwidth of the communication channel. Channel loss, signal crosstalk, and power integrity are the important factors affecting the bandwidth of the channel and must be fully understood when designing such high-speed links. Moreover, channel performance optimization requires system level analysis with co-design of different channel components in order to approach the maximum capacity of a channel. In this thesis, we focus on the essential aspects of high-speed channel design with an emphasis on the design of the package area. A technique for reducing discontinuities in the package is introduced, studied, and simulated on IBM package designs to obtain improved package performance. The critical Plated-Through-Hole (PTH) via region at the package and Printed Circuit Board (PCB) interface is also analyzed in a co-study to suggest design rules for overall improved system performance.en_US
dc.description.statementofresponsibilityby Asad Kalantarian.en_US
dc.format.extent79 p.en_US
dc.language.isoengen_US
dc.publisherMassachusetts Institute of Technologyen_US
dc.rightsM.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.en_US
dc.rights.urihttp://dspace.mit.edu/handle/1721.1/7582en_US
dc.subjectElectrical Engineering and Computer Science.en_US
dc.titlePackage and PCB solutions for high-speed data link applicationsen_US
dc.title.alternativePackage and printed circuit board solutions for high-speed data link applicationsen_US
dc.typeThesisen_US
dc.description.degreeM.Eng.en_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
dc.identifier.oclc400009371en_US


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