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Decimator implementation for a pipelined oversampling analog-to-digital converter

dc.contributor.advisorHae-Seung Lee.en_US
dc.contributor.authorGoodrich, John A. (John Alexander), 1974-en_US
dc.date.accessioned2009-06-30T17:51:59Z
dc.date.available2009-06-30T17:51:59Z
dc.date.copyright1998en_US
dc.date.issued1998en_US
dc.identifier.urihttp://hdl.handle.net/1721.1/46194
dc.descriptionThesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1998.en_US
dc.descriptionIncludes bibliographical references (leaf 59).en_US
dc.description.statementofresponsibilityby John A. Goodrich.en_US
dc.format.extent59 leavesen_US
dc.language.isoengen_US
dc.publisherMassachusetts Institute of Technologyen_US
dc.rightsM.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.en_US
dc.rights.urihttp://dspace.mit.edu/handle/1721.1/7582en_US
dc.subjectElectrical Engineering and Computer Scienceen_US
dc.titleDecimator implementation for a pipelined oversampling analog-to-digital converteren_US
dc.title.alternativeDecimator implementation for a pipelined oversampling A/D converteren_US
dc.typeThesisen_US
dc.description.degreeM.Eng.en_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
dc.identifier.oclc40487620en_US


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