Nonvolatile memory devices with colloidal, 1.0 nm silicon nanoparticles : principles of operation, fabrication, measurements, and analysis
Author(s)Nayfeh, Osama Munir, 1980-
Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
Dimitri A. Antoniadis.
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Silicon nanoparticles are candidate charge trapping and storage elements for future high density, low-voltage nonvolatile memory devices. Most previous works have studied nanoparticles of larger than 5 nm size and exhibited bulk-like trapping characteristics. Technologically viable and competitive future devices, however, will require nanoparticles of sub 3-nm dimensions; a zero-dimensional regime where significant changes to silicon electronic structure occur. In this thesis, the physical processes involved in charge based nonvolatile memory device operation with colloidal mono-disperse 1.0 nm silicon nanoparticles embedded in a metal-oxide-semiconductor (MOS) gate stack is studied for the first time. Spin-coating was used to uniformly deliver the nanoparticle colloid across 150 mm wafers with density control over a thin tunneling oxide. Material characterization via spectroscopic ellipsometry, atomic force microscopy and transmission electron microscopy showed that across wafer sub-monolayer coverage with low-levels of agglomeration was achieved with nanoparticles so positioned possibly due to solvent-mediated self-assembly effects, and that the intrinsic nanoparticle crystallinity was intact after complete device processing. MOS capacitors with Si nanoparticles embedded in their dielectric exhibit strong endurance and well-behaved impedance (capacitance-voltage) characteristics with persistent hysteresis and only 53 mV standard deviation across wafer. Measurements showed that successive dilution of the nanoparticle colloid correlated directly with a decreased measured hysteresis and similarly fabricated zero-nanoparticle control devices exhibited a negligible hysteresis. Systems with 1.0 nm nanoparticles exhibited pure hole storage.(cont.) Energy band analysis was used to understand the nature of charging, hole-type versus electron-type and pure hole-type charging was shown to occur due to the characteristics of ultra-small silicon nanoparticles: large energy gap, large charging energy, and consequently small electron affinity. The retention time behavior of the 1.0 nm nanoparticle device was shown to be reduced due to a reduced valence band-offset with SiO2, however the programming time is shown to be dramatically reduced over that of conventional bulk devices. Quantum mechanical tunneling calculations were used to explore and predict routes for increasing the retention behavior by modulating the tunneling distance and experimental devices based on these calculations were fabricated in the SiO2 system to study experimentally directly these dependencies.
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2009.Includes bibliographical references (leaves 101-105).
DepartmentMassachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
Massachusetts Institute of Technology
Electrical Engineering and Computer Science.