Generating efficient layouts from optimized MOS circuit schematics

Author(s)
Baltus, Donald George.
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Description
Also issued as Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1988.
 
Includes bibliographical references.
 
Date issued
1988
URI
http://hdl.handle.net/1721.1/4957
Publisher
Research Laboratory of Electronics, Massachusetts Institute of Technology
Other identifiers
no. 535
Series/Report no.
Technical report (Massachusetts Institute of Technology. Research Laboratory of Electronics) ; 535.
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