The Other Face of On-Chip Interconnect
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The multicore revolution has changed the way we think about computing. The same movement has also changed the way we look at on-chip interconnect because it is a key determinant of the performance and power efficiency of multicores. This talk will highlight some of the lesser known issues and opportunities of on-chip interconnect, such as protection, programming ease, and the impact on the basic structure of our software. The talk will borrow heavily from our experiences with on-chip interconnect in university research with the 16-core Raw multicore processor, in a commercial environment with Tilera's 64-core Tile processor, and in a future 1K-core multicore processor called ATAC that integrates optical and electrical interconnects.
DepartmentMassachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratory; Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Proceedings of the 17th IEEE Symposium on High Performance Interconnects, 2009. HOTI 2009.
Institute of Electrical and Electronics Engineers
Agarwal, A. "Keynote: The Other Face of On-Chip Interconnect," in Proceedings of the 17th IEEE Symposium on High Performance Interconnects, 2009. HOTI 2009. pp.xii-xii, 25-27 Aug. 2009. ©2009 Institute of Electrical and Electronics Engineers.
Final published version
INSPEC Accession Number: 10869154