Pentacene integrated thin-film transistors and circuits

Abstract

Organic semiconductors offer the potential of large-area, mechanically flexible electronics due to their low processing temperatures. We have developed a near-room-temperature (< 95°C) process flow to fabricate pentacene integrated organic thin-film transistors (OTFTs) compatible with plastic substrates such as polyethylene terephthalate (PET). Integration of inkjet printed organic photoconductors (OPDs) based on titanyl pthalocyanine with OTFTs is demonstrated for the first time in an integrated process. Using the OTFT as a switch in series with an OPD, a pixel circuit was designed and measured, in addition to a proof-of-concept 4x4 active matrix imager. The individual pixels were measured to have a responsivity of 6x10-5 A/W, and a pixel on/off conductance ratio of 880, both at an irradiance of 5 mW/cm 2. The imager uses a 25 V power supply and was shown to correctly image a "T" pattern after 1st order calibration. A model for the current-voltage characteristics based upon amorphous silicon models was implemented in MATLAB to investigate design trade-offs in organic digital circuits. A dual threshold voltage process is suggested to enable area-efficient zero-VGS current sources. The area and power savings of this approach is discussed compared to a single VT process. We also motivate the necessity for lowering the power supply, both for area savings and improvement in circuit lifetime due to reduction in bias stress effects. A process flow for a dual VT OTFT technology, enabled using two gate metals, is presented. By using a low work function metal (aluminum) and a high work function metal (platinum), we can obtain two threshold voltage devices.

(cont.) Devices were measured to be nominally identical, shifted by a VSG which we call the [Delta]VT. A [Delta]VT of 0.6 V was consistently observed over multiple wafer lots. This is the first demonstration of modification of OTFT VT by changing the gate work function. Area-minimized digital logic designed in the dual VT technology was demonstrated with a 3 V supply, the lowest supply reported for integrated OTFTs. In addition, we report some of the first analog organic integrated circuits, including a differential pair with differential gain of 23 dB and common-mode rejection ratio (CMRR) of 23 dB. A two-stage uncompensated operational amplifier was fabricated and measured to have an open-loop gain of 36 dB and unity gain frequency of 7.5 Hz. The op-amp has a unity gain-bandwidth product of 473 Hz while dissipating < 2 nW with a 5 V supply. The comparator uses 5 nW of power, and has an input offset of 200 mV. We show the frequency response of the op-amp and comparator are dominated by parasitic overlap capacitances. The parasitics of the zero-VGs load limits frequency response, and technological improvements to increase operating frequency are suggested. We motivate a self-aligned process flow, which uses a high optical density gate to serve as a mask layer. A backside exposure patterns the source/drain layer. It is demonstrated that the parasitic capacitances can be reduced by almost an order of magnitude, from 1 fF/jlm to 0.15 fF/jm. A method to improve carrier mobility is also presented. These process improvements have the potential to improve the switching speeds of organic circuits by more than two orders of magnitude.