High-speed modulation of resonant CMOS photonic modulators in deep-submicron bulk-CMOS

Abstract

Processor manufacturers have turned to parallelism to continue to improve processor performance, and the bandwidth demands of these systems have risen. Silicon photonics can lower the energy-per-bit of core-to-core and core-to-memory interconnects to help alleviate bandwidth bottlenecks. In this thesis, methods of controlling the amount of charge entering the PiN-diode structure of a photonic ring modulator are investigated to achieve high energy-efficiency in a constrained monolithic process. A digital modulator driver circuit is designed, simulated, fabricated and partially tested. This circuit uses a push-pull topology with pre emphasis to reduce the energy per bit and to prevent the ring's optical passband from shifting to the next optical channel. A flexible driver test circuit for in-situ device characterization has been developed with a device-to-circuit modeling framework. There are many tradeoffs that must be analyzed from the system, circuit, and device levels.