Hysteresis and memory effects in nanocrystal embedded MOS capacitors

Abstract

Nanocrystal Memory is a promising new memory type which utilizes silicon nanocrystals and quantum mechanical direct tunneling current for charge storage. This thesis presents the work done to characterize the memory effect in nanocrystal embedded metal-oxide-semiconductor (NC-MOS) capacitors, the fundamental components of the nanocrystal memory. Various properties of the NC-MOS capacitors including gate stack composition, oxide charge storage and interface traps are studied by making high frequency and quasi-static capacitance voltage and current voltage measurements. High frequency and quasi-static capacitance characteristics reveal hysteresis which is evidence for the memory effect. A hysteresis of 2 V is demonstrated which is large enough to enable the use of nanocrystal embedded devices as memory devices. Measurement results suggest that the tunneling in the accumulation bias regime is mostly electron tunneling from the channel into the nanocrystals, and the tunneling in the inversion bias regime is hole tunneling from the channel into the nanocrystals. Charge is stored in the nanocrystals either in the discrete quantum dot states or in the interface traps that surround the nanocrystals. The oxide thickness is varied to control the tunneling rate and the retention time. A thinner tunnel oxide is necessary for achieving a higher tunneling rate which provides a faster write/erase. However, when the barrier thickness is lower, the charge confined in the nanocrystals can leak back into the channel more easily. Measurement conditions such as bias schemes, hold times, sweep rates and illumination can significantly influence the memory effect. It is demonstrated that the memory effect is enhanced by longer hold times, wider sweep regimes and light.