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dc.contributor.authorSodini, Charles G.
dc.contributor.authorNausieda, Ivan A.
dc.contributor.authorRyu, Kevin K.
dc.contributor.authorHe, David Da
dc.contributor.authorAkinwande, Akintunde Ibitayo
dc.contributor.authorBulovic, Vladimir
dc.date.accessioned2010-11-21T21:48:50Z
dc.date.available2010-11-21T21:48:50Z
dc.date.issued2009-12
dc.identifier.isbn978-1-4244-5639-0
dc.identifier.otherE-ISBN: 978-1-4244-5640-6
dc.identifier.otherINSPEC Accession Number: 11207408
dc.identifier.urihttp://hdl.handle.net/1721.1/60019
dc.description.abstractFor the first time, we demonstrate control of organic thinfilm transistor's (OTFT) threshold voltage (V [subscript T]) by modifying the gate work function. We present a near-room-temperature, fully lithographic process to fabricate integrated pentacene dual V [subscript T] OTFTs suitable for large-area and flexible mixed signal circuits. Platinum and aluminum are used as the gate metals for the high V [subscript T] (more depletion-like) and low V [subscript T] (more enhancement-like) p-channel devices, respectively. The availability of a high V [subscript T] device enables area-efficient zero-VGS current source loads. We demonstrate positive noise margin inverters which use pico Watts of power and a 3 V supply. Compared to a single V [subscript T] implementation, the dual V [subscript T] inverter occupies an area that is 30Ã Â smaller, and is 17Ã Â faster. These results show that p-channel only organic technologies can produce functional and low-power circuits without integrating a complementary device.en_US
dc.description.sponsorshipSemiconductor Research Corporation. Center for Circuits and Systems Solutions (Contract 2003-CT-888)en_US
dc.description.sponsorshipMartin Family Society of Fellows for Sustainabilityen_US
dc.language.isoen_US
dc.publisherInstitute of Electrical and Electronics Engineersen_US
dc.relation.isversionofhttp://dx.doi.org/10.1109/IEDM.2009.5424345en_US
dc.rightsArticle is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use.en_US
dc.sourceIEEEen_US
dc.titleDual Threshold Voltage Integrated Organic Technology for Ultralow-power Circuitsen_US
dc.typeArticleen_US
dc.identifier.citationNausieda, I. et al. “Dual threshold voltage integrated organic technology for ultralow-power circuits.” Electron Devices Meeting (IEDM), 2009 IEEE International. 2009. 1-4. © 2009, IEEEen_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Scienceen_US
dc.contributor.departmentMassachusetts Institute of Technology. Microsystems Technology Laboratoriesen_US
dc.contributor.approverSodini, Charles G.
dc.contributor.mitauthorSodini, Charles G.
dc.contributor.mitauthorNausieda, Ivan A.
dc.contributor.mitauthorRyu, Kevin K.
dc.contributor.mitauthorHe, David Da
dc.contributor.mitauthorAkinwande, Akintunde Ibitayo
dc.contributor.mitauthorBulovic, Vladimir
dc.relation.journalIEEE International Electron Devices Meetingen_US
dc.eprint.versionFinal published versionen_US
dc.type.urihttp://purl.org/eprint/type/ConferencePaperen_US
dspace.orderedauthorsNausieda, I.; Ryu, K.; He, D.; Akinwande, A. I.; Bulovic, V.; Sodini, C. G.en
dc.identifier.orcidhttps://orcid.org/0000-0003-3001-9223
dc.identifier.orcidhttps://orcid.org/0000-0002-0960-2580
dc.identifier.orcidhttps://orcid.org/0000-0002-0413-8774
mit.licensePUBLISHER_POLICYen_US


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