dc.contributor.author | Sodini, Charles G. | |
dc.contributor.author | Nausieda, Ivan A. | |
dc.contributor.author | Ryu, Kevin K. | |
dc.contributor.author | He, David Da | |
dc.contributor.author | Akinwande, Akintunde Ibitayo | |
dc.contributor.author | Bulovic, Vladimir | |
dc.date.accessioned | 2010-11-21T21:48:50Z | |
dc.date.available | 2010-11-21T21:48:50Z | |
dc.date.issued | 2009-12 | |
dc.identifier.isbn | 978-1-4244-5639-0 | |
dc.identifier.other | E-ISBN: 978-1-4244-5640-6 | |
dc.identifier.other | INSPEC Accession Number: 11207408 | |
dc.identifier.uri | http://hdl.handle.net/1721.1/60019 | |
dc.description.abstract | For the first time, we demonstrate control of organic thinfilm transistor's (OTFT) threshold voltage (V [subscript T]) by modifying the gate work function. We present a near-room-temperature, fully lithographic process to fabricate integrated pentacene dual V [subscript T] OTFTs suitable for large-area and flexible mixed signal circuits. Platinum and aluminum are used as the gate metals for the high V [subscript T] (more depletion-like) and low V [subscript T] (more enhancement-like) p-channel devices, respectively. The availability of a high V [subscript T] device enables area-efficient zero-VGS current source loads. We demonstrate positive noise margin inverters which use pico Watts of power and a 3 V supply. Compared to a single V [subscript T] implementation, the dual V [subscript T] inverter occupies an area that is 30Ã Â smaller, and is 17Ã Â faster. These results show that p-channel only organic technologies can produce functional and low-power circuits without integrating a complementary device. | en_US |
dc.description.sponsorship | Semiconductor Research Corporation. Center for Circuits and Systems Solutions (Contract 2003-CT-888) | en_US |
dc.description.sponsorship | Martin Family Society of Fellows for Sustainability | en_US |
dc.language.iso | en_US | |
dc.publisher | Institute of Electrical and Electronics Engineers | en_US |
dc.relation.isversionof | http://dx.doi.org/10.1109/IEDM.2009.5424345 | en_US |
dc.rights | Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use. | en_US |
dc.source | IEEE | en_US |
dc.title | Dual Threshold Voltage Integrated Organic Technology for Ultralow-power Circuits | en_US |
dc.type | Article | en_US |
dc.identifier.citation | Nausieda, I. et al. “Dual threshold voltage integrated organic technology for ultralow-power circuits.” Electron Devices Meeting (IEDM), 2009 IEEE International. 2009. 1-4. © 2009, IEEE | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Microsystems Technology Laboratories | en_US |
dc.contributor.approver | Sodini, Charles G. | |
dc.contributor.mitauthor | Sodini, Charles G. | |
dc.contributor.mitauthor | Nausieda, Ivan A. | |
dc.contributor.mitauthor | Ryu, Kevin K. | |
dc.contributor.mitauthor | He, David Da | |
dc.contributor.mitauthor | Akinwande, Akintunde Ibitayo | |
dc.contributor.mitauthor | Bulovic, Vladimir | |
dc.relation.journal | IEEE International Electron Devices Meeting | en_US |
dc.eprint.version | Final published version | en_US |
dc.type.uri | http://purl.org/eprint/type/ConferencePaper | en_US |
dspace.orderedauthors | Nausieda, I.; Ryu, K.; He, D.; Akinwande, A. I.; Bulovic, V.; Sodini, C. G. | en |
dc.identifier.orcid | https://orcid.org/0000-0003-3001-9223 | |
dc.identifier.orcid | https://orcid.org/0000-0002-0960-2580 | |
dc.identifier.orcid | https://orcid.org/0000-0002-0413-8774 | |
mit.license | PUBLISHER_POLICY | en_US |
mit.metadata.status | Complete | |